The cost of microprocessors has dropped drastically due to the benefits of mass production. Contrary to the drop in the cost of microprocessor hardware, the cost of software to support these microprocessors has risen. This inconsistency in the cost of implementing microprocessor controlled apparatuses has hampered their proliferation.
One major reason for the high cost of microprocessor software stems from the fact that programming methods previously used with large computers are now being used in microprocessors. As an example, consider the system where portions of assemblers and compilers are loaded into read/write memory from an input/output device. Next, source language is read from one device while partly processed output is written on another. Subroutines are then read in from another device and addresses are relocated so that all code required to run a job fits together in memory with no wasted words between.
Although the latter approach to programming made sense in the early days of computers when memory was prohibitively expensive, memory costs have dropped drastically with read only memory currently being the cheapest kind and available in very small capacities. In addition, microprocessors are being utilized in many direct control environments which require no writing or rereading of data. Thus, in many cases, input/output devices are only required for program development.
It is almost universally true that mass production achieves low unit cost by turning out large sums of identical products. In the case of microprocessor programs which are often implemented in read only memories (ROMs), the obvious way of carrying out mass production is to manufacture large quantities of ROMs with identical contents. The drawback to this approach lies in the prevalent method of linking various pieces of software together into a complete software system, which requires many address changes in each segment. Thus, one factor that has prevented the mass distribution of modular computer programs implemented in ROM form is that often a program instruction must know the absolute location in the memory system of another instruction in the same subprogram, for example, for branching. Therefore, if a computer manufacturer wanted to offer a catalog of subprograms in ROM form, he would have to contend with the desire of different users to select various offerings and locate the selected offerings at different actual locations in memory. It would not be feasible for the manufacturer to assign each subprogram a unique location as the total available memory locations would rapidly be exhausted. What is needed then, is a way to modify the address portion of certain of the ROM'ed instructions before they are used as addresses by the microprocessor.
One solution to the problem presented lies in the use of base registers. Base registers provide a hardware facility that relocates addresses as needed during program execution, making it unnecessary to change them within the program.
In the prior art, base registers have been designed into the microprocessor's CPU chip or added on by the system builder. The apparatus described by John A. Carroll in "Solving Mass-Produced ROM Programming Problems With Base Registers", Computer Design, August, 1977, pp. 99, proposes a base register system for solving the problem presented. The Carroll apparatus includes a set of base registers, and adder/selector circuitry located functionally between the CPU's address bus lines and the memory system address bus lines. Several bits of the CPU's address bus are used to select a base register, which is added to the remaining bits to produce the memory system address.
Although the Carroll apparatus represents an advance over the prior art, it appears to have several drawbacks. First, since it is undesirable to require the CPU to massage the address read from program memory before issuing it on its address bus, the base register select bits must be precoded into the mass produced program ROM. Since a user application will most likely require the use of several base registers, the number of which will increase with the number of subprogram modules used in the system, each of the ROMs must provide a sufficient number of bits of base-register select information to accommodate the largest foreseeable programming system and this base register address is not alterable since it is ROM'ed. Hence, the situation is similar to the original problem experienced, with the branch register address space substituted for the memory system address space. Although this drawback could be overcome by swapping the base register contents before beginning operation with a subprogram which uses that branch register, such a routine is expensive in system program overhead. Alternatively, the branch register select portion of the address could be provided by special hardware in each system, but this would defeat the objective of a mass produced system.
The second drawback of the Carroll apparatus is that the hardware required to perform the address relocation is located at or within the CPU. That is, either the branch register array and select/adder circuitry must be located on a special chip or it must be on the CPU chip, which may be the most valuable silicon real estate in the system. In the latter case, the requirement that all of the branch registers that any user might need must be sold to all users would impose a significant drain on the logic available on the CPU chip. In either case, locating the branch register array and adder/selector centrally presents additional problems in the implementation of multiprocessor systems in which multiple CPUs, each performing different tasks at any one time, share common system address buses, data buses, and program memory.
A second solution to the problem presented lies in the implementation of a "jump relative" instruction as one member of the microprocessor's instruction set. Basically, a jump relative instruction is a branch instruction with the object of the branch specifying a positive or negative number of storage words. The microprocessor adds the object of the jump relative instruction to the storage address the jump relative instruction is located at to come up with the effective address to be branched to.
The main drawback of the jump relative instruction is that since it is ROM'ed, the object of the instruction cannot be altered. Hence, if a first subprogram located in a first ROM required the use of a second subprogram located in a second ROM, the memory system address space within which the second ROM was located would have to correspond to the effective address specified by the ROM'ed jump relative instruction. This would prevent the user from choosing from a catalog of ROM contained subprograms and locating the subprograms at any available location in the microprocessor's memory system he chose.
Further, the availability of a jump relative instruction would not compensate for the other benefits associated with a base register. A base register can be used to store the location of RAM workspace the subprogram requires for storing or manipulating data. A base register may also be used for storing personality constants which preselect some subset of the subprogram's capability or for providing the addresses of input/output devices.
Additionally, since the jump relative instruction would have to be implemented on the CPU chip, the logic required to implement the instruction might cause a drain on the limited space available on the CPU chip.
Another advance over the prior art is the device disclosed in a pending U.S. Patent application entitled "Device For Automatic Modification Of ROM Contents By A System Selected Variable", by the same inventor as the instant invention, filed June 29, 1978, and assigned to the same assignee as the present application. In the device disclosed in the latter mentioned application, the software utilized by a microprocessor is stored in a plurality of ROM packages connected to the microprocessor by an a-bit address bus, an n-bit bidirectional data bus and at least one control line. These ROM packages comprise the microprocessor's memory system and each is associated with a unique set of absolute system addresses.
Each ROM package includes a 2.sup.a X (N + 1) bit ROM where 2.sup.a represents the number of (n + 1) bit locations in the respective ROM. Each ROM package is used to store a sequence of n-bit program instructions which constitute a subprogram. Each instruction is stored in n bits of an (n + 1) bit word. The (n + 1)st bit position is used to indicate whether the associated instruction contains a memory system address. Each subprogram is written assuming it is located starting at memory system address zero.
Also located in each ROM package is an n-bit base register, which is loaded under control of the operating system software with an offset address specifying the difference between the actual memory system address of the first addressable location in the associated ROM and the assumed memory system address.
When the microprocessor transmits a memory system address to the memory system, the ROM package corresponding to the specified memory system address receives the address and initiates a read cycle to its ROM. The (n + 1) bit word addressed is read out of the ROM. The (n + 1)st bit read from the ROM is fed into a gating circuit contained on the ROM package. If the (n + 1)st bit is on the gating circuit gates the contents of the base register into one input of an n-bit adder also located on the ROM package, the second input to the adder coming from the first n bits of the (n + 1) bits read out of the ROM. The adder adds the offset value to the address portion of the instruction read out of the ROM. A driver circuit, located on the ROM package and connected to the adder output, transmits the relocated program instruction to the microprocessor.
In the case when the (n + 1)st bit read from ROM is a zero, the gating circuit is turned off and the output of the gating circuit is n-bits of all zeros. In such case, the output of the adder is identical to the other input to the adder; viz., the first n bits of the (n + 1) bit word read out of the ROM.
The limitation of the latter described device is that it contains only one base register. As a result, if the subprogram contained in a first ROM contains a branch to a second subprogram contained in a second ROM, the first subprogram must know the location of the second subprogram and this location is fixed since the branch instruction is ROM'ed. Although the first ROM could use its single base register to store the location of the second subprogram, this would require either sacrificing the ability to relocate addresses in the first subprogram or having the operating system program reload the base register with the address of the second subprogram prior to branching to it.
By including multiple base registers within each ROM package, additional capabilities beyond those available in a single base register ROM package are achieved. For example, the memory space address of other subprogram modules required by a first subprogram can be specified. Other uses for additional base registers include specifying the address of RAM workspace that the subprogram may require or storing personality constants which preselect some subset of the subprogram's capability or to provide the addresses of the input/output devices.
It is a general object of the present invention to eliminate these and other drawbacks of the prior art by providing an improved apparatus for relocating addresses as needed during program execution.
It is another object of the present invention to provide an apparatus for relocating program addresses by the addition of one of a plurality of system selected variables.
It is a further object of the present invention to provide a self-contained, mass-produced ROM based memory module for use as a computer's external memory, which allows a user to locate subprograms in any address space he desires without hardware customization.
These and other objects, features and advantages of the present invention will become more apparent from the detailed description of the preferred embodiment when read in conjunction with the drawings.